The present invention relates to a bus structure in a semiconductor integrated circuit device such as a system LSI, a method of designing an interface and a database for use in design of an interface.
A part designated as an interface for connecting a CPU of a semiconductor circuit and a circuit controlled by the CPU is conventionally significant for communication between the CPU and the circuit. The essential portion of the interface is a signal line designated as a bus, and a system for controlling data input/output, for example, controlling how right to access to the bus is acquired, is significant in sending data. In other words, the interface including the bus structure is an element having a great influence upon the ultimate performance of a device.
The conventionally known bus structures are, as is shown in FIG. 1, a Neumann architecture type bus structure used in a Neumann processor and a Harvard type bus structure used in a Harvard processor. In the Neumann architecture type bus structure, merely an address and a data are distinguished from each other, so that an address and a data can be expressed together by one line or an address and a data can be respectively expressed by two lines. Known examples of the Neumann architecture type bus structure are a multiplexer type bus structure in which an address and a data are transferred through a common bus and a demultiplexer type bus structure in which an address and a data are respectively transferred through different buses, namely, an address bus and a data bus.
A Harvard processor has a structure in which data are divided depending upon their contents into control data and data of an actually transferred file. A known Harvard type bus structure conventionally developed is a bus structure in which the address bus is further divided into an IO address bus and a memory address bus and the data bus is further divided into a control data bus and a transfer data bus (hereinafter referred to as the data separate type bus structure).
The multiplexer type bus structure is used for serially processing control and transfer of addresses and data, and the throughput attained by this structure is comparatively low but the area occupied by the bus (bandwidth) is small. The demultiplexer type bus structure is used for processing control/transfer of addresses and control/transfer of data in parallel, and since the parallel processing can be conducted, higher processing speed is attained by this structure.
Furthermore, the data separate type bus structure, that is, the conventional Harvard type bus structure, is used for processing control and transfer in parallel with respect to both addresses and data, and hence, the throughput is further higher.
In constructing a conventional large scale device such as a system LSI, however, an appropriate method of constructing the structure of an interface has not been established yet. Specifically, with respect to the bus structure alone, each of the known bus structures has both advantages and disadvantages, and a method of integrally evaluating the bus structure in relation to the operations of respective circuits has not been established yet.
Moreover, the scale of semiconductor integrated circuits is increasing. Therefore, in design of, for example, a device designated as a system LSI including a combination of plural semiconductor circuits, a flexibly usable bus structure cannot be obtained in designing an interface by employing any of the conventional bus structures alone.